can bus shield featured
class MCP_CAN
class MCP_CAN
Procesy5-weight-matrix/CAN_BUS_Shield.git/mcp_can.hclass MCP_CAN
{
private:
INT8U m_nExtFlg; /* identifier xxxID */
/* either extended (the 29 LSB) */
/* or standard (the 11 LSB) */
INT32U m_nID; /* can id */
INT8U m_nDlc; /* data length: */
INT8U m_nDta[MAX_CHAR_IN_MESSAGE]; /* data */
INT8U m_nRtr; /* rtr */
INT8U m_nfilhit;
INT8U SPICS;
SPIClass *pSPI;
...void mcp2515_reset(void);
/* reset mcp2515 */
INT8U mcp2515_readRegister(const INT8U address);
/* read mcp2515's register */
void mcp2515_readRegisterS(const INT8U address, INT8U values[], const INT8U n);
/* set mcp2515's register */
void mcp2515_setRegisterS(const INT8U address, const INT8U values[], const INT8U n);
/* set mcp2515's registers */
Function name mcp2515_readRegister
read
register
/*********************************************************************************************************
** Function name: mcp2515_readRegister
** Descriptions: read register
*********************************************************************************************************/
INT8U MCP_CAN::mcp2515_readRegister(const INT8U address)
{
INT8U ret;
MCP2515_SELECT();
spi_readwrite(MCP_READ);
spi_readwrite(address);
ret = spi_read();
MCP2515_UNSELECT();
return ret;
}Function: mcp2515_configRate
set
boadrate
/*********************************************************************************************************
** Function name: mcp2515_configRate
** Descriptions: set boadrate
*********************************************************************************************************/
INT8U MCP_CAN::mcp2515_configRate(const INT8U canSpeed, const INT8U clock)
{
INT8U set, cfg1, cfg2, cfg3;
set = 1;
switch (clock)
{
case (MCP_16MHz) :
switch (canSpeed)
{
case (CAN_5KBPS):
cfg1 = MCP_16MHz_5kBPS_CFG1;
cfg2 = MCP_16MHz_5kBPS_CFG2;
cfg3 = MCP_16MHz_5kBPS_CFG3;
break;
case (CAN_10KBPS):
cfg1 = MCP_16MHz_10kBPS_CFG1;
cfg2 = MCP_16MHz_10kBPS_CFG2;
cfg3 = MCP_16MHz_10kBPS_CFG3;
break;
case (CAN_20KBPS):
cfg1 = MCP_16MHz_20kBPS_CFG1;
cfg2 = MCP_16MHz_20kBPS_CFG2;
cfg3 = MCP_16MHz_20kBPS_CFG3;
break;
case (CAN_31K25BPS):
cfg1 = MCP_16MHz_31k25BPS_CFG1;
cfg2 = MCP_16MHz_31k25BPS_CFG2;
cfg3 = MCP_16MHz_31k25BPS_CFG3;
break;
case (CAN_33KBPS):
cfg1 = MCP_16MHz_33kBPS_CFG1;
cfg2 = MCP_16MHz_33kBPS_CFG2;
cfg3 = MCP_16MHz_33kBPS_CFG3;
break;
case (CAN_40KBPS):
cfg1 = MCP_16MHz_40kBPS_CFG1;
cfg2 = MCP_16MHz_40kBPS_CFG2;
cfg3 = MCP_16MHz_40kBPS_CFG3;
break;
case (CAN_50KBPS):
cfg1 = MCP_16MHz_50kBPS_CFG1;
cfg2 = MCP_16MHz_50kBPS_CFG2;
cfg3 = MCP_16MHz_50kBPS_CFG3;
break;
case (CAN_80KBPS):
cfg1 = MCP_16MHz_80kBPS_CFG1;
cfg2 = MCP_16MHz_80kBPS_CFG2;
cfg3 = MCP_16MHz_80kBPS_CFG3;
break;
case (CAN_83K3BPS):
cfg1 = MCP_16MHz_83k3BPS_CFG1;
cfg2 = MCP_16MHz_83k3BPS_CFG2;
cfg3 = MCP_16MHz_83k3BPS_CFG3;
break;
case (CAN_95KBPS):
cfg1 = MCP_16MHz_95kBPS_CFG1;
cfg2 = MCP_16MHz_95kBPS_CFG2;
cfg3 = MCP_16MHz_95kBPS_CFG3;
break;
case (CAN_100KBPS): /* 100KBPS */
cfg1 = MCP_16MHz_100kBPS_CFG1;
cfg2 = MCP_16MHz_100kBPS_CFG2;
cfg3 = MCP_16MHz_100kBPS_CFG3;
break;
case (CAN_125KBPS):
cfg1 = MCP_16MHz_125kBPS_CFG1;
cfg2 = MCP_16MHz_125kBPS_CFG2;
cfg3 = MCP_16MHz_125kBPS_CFG3;
break;
case (CAN_200KBPS):
cfg1 = MCP_16MHz_200kBPS_CFG1;
cfg2 = MCP_16MHz_200kBPS_CFG2;
cfg3 = MCP_16MHz_200kBPS_CFG3;
break;
case (CAN_250KBPS):
cfg1 = MCP_16MHz_250kBPS_CFG1;
cfg2 = MCP_16MHz_250kBPS_CFG2;
cfg3 = MCP_16MHz_250kBPS_CFG3;
break;
case (CAN_500KBPS):
cfg1 = MCP_16MHz_500kBPS_CFG1;
cfg2 = MCP_16MHz_500kBPS_CFG2;
cfg3 = MCP_16MHz_500kBPS_CFG3;
break;
case (CAN_1000KBPS):
cfg1 = MCP_16MHz_1000kBPS_CFG1;
cfg2 = MCP_16MHz_1000kBPS_CFG2;
cfg3 = MCP_16MHz_1000kBPS_CFG3;
break;
default:
set = 0;
break;
}
break;
case (MCP_8MHz) :
switch (canSpeed)
{
case (CAN_5KBPS) :
cfg1 = MCP_8MHz_5kBPS_CFG1;
cfg2 = MCP_8MHz_5kBPS_CFG2;
cfg3 = MCP_8MHz_5kBPS_CFG3;
break;
case (CAN_10KBPS) :
cfg1 = MCP_8MHz_10kBPS_CFG1;
cfg2 = MCP_8MHz_10kBPS_CFG2;
cfg3 = MCP_8MHz_10kBPS_CFG3;
break;
case (CAN_20KBPS) :
cfg1 = MCP_8MHz_20kBPS_CFG1;
cfg2 = MCP_8MHz_20kBPS_CFG2;
cfg3 = MCP_8MHz_20kBPS_CFG3;
break;
case (CAN_31K25BPS) :
cfg1 = MCP_8MHz_31k25BPS_CFG1;
cfg2 = MCP_8MHz_31k25BPS_CFG2;
cfg3 = MCP_8MHz_31k25BPS_CFG3;
break;
case (CAN_40KBPS) :
cfg1 = MCP_8MHz_40kBPS_CFG1;
cfg2 = MCP_8MHz_40kBPS_CFG2;
cfg3 = MCP_8MHz_40kBPS_CFG3;
break;
case (CAN_50KBPS) :
cfg1 = MCP_8MHz_50kBPS_CFG1;
cfg2 = MCP_8MHz_50kBPS_CFG2;
cfg3 = MCP_8MHz_50kBPS_CFG3;
break;
case (CAN_80KBPS) :
cfg1 = MCP_8MHz_80kBPS_CFG1;
cfg2 = MCP_8MHz_80kBPS_CFG2;
cfg3 = MCP_8MHz_80kBPS_CFG3;
break;
case (CAN_100KBPS) : /* 100KBPS */
cfg1 = MCP_8MHz_100kBPS_CFG1;
cfg2 = MCP_8MHz_100kBPS_CFG2;
cfg3 = MCP_8MHz_100kBPS_CFG3;
break;
case (CAN_125KBPS) :
cfg1 = MCP_8MHz_125kBPS_CFG1;
cfg2 = MCP_8MHz_125kBPS_CFG2;
cfg3 = MCP_8MHz_125kBPS_CFG3;
break;
case (CAN_200KBPS) :
cfg1 = MCP_8MHz_200kBPS_CFG1;
cfg2 = MCP_8MHz_200kBPS_CFG2;
cfg3 = MCP_8MHz_200kBPS_CFG3;
break;
case (CAN_250KBPS) :
cfg1 = MCP_8MHz_250kBPS_CFG1;
cfg2 = MCP_8MHz_250kBPS_CFG2;
cfg3 = MCP_8MHz_250kBPS_CFG3;
break;
case (CAN_500KBPS) :
cfg1 = MCP_8MHz_500kBPS_CFG1;
cfg2 = MCP_8MHz_500kBPS_CFG2;
cfg3 = MCP_8MHz_500kBPS_CFG3;
break;
case (CAN_1000KBPS) :
cfg1 = MCP_8MHz_1000kBPS_CFG1;
cfg2 = MCP_8MHz_1000kBPS_CFG2;
cfg3 = MCP_8MHz_1000kBPS_CFG3;
break;
default:
set = 0;
break;
}
break;
default:
set = 0;
break;
}
if (set) {
mcp2515_setRegister(MCP_CNF1, cfg1);
mcp2515_setRegister(MCP_CNF2, cfg2);
mcp2515_setRegister(MCP_CNF3, cfg3);
return MCP2515_OK;
}
else {
return MCP2515_FAIL;
}
}Function name: mcp2515_write_id
write can
id
/*********************************************************************************************************
** Function name: mcp2515_write_id
** Descriptions: write can id
*********************************************************************************************************/
void MCP_CAN::mcp2515_write_id( const INT8U mcp_addr, const INT8U ext, const INT32U id )
{
uint16_t canid;
INT8U tbufdata[4];
canid = (uint16_t)(id & 0x0FFFF);
if ( ext == 1)
{
tbufdata[MCP_EID0] = (INT8U) (canid & 0xFF);
tbufdata[MCP_EID8] = (INT8U) (canid >> 8);
canid = (uint16_t)(id >> 16);
tbufdata[MCP_SIDL] = (INT8U) (canid & 0x03);
tbufdata[MCP_SIDL] += (INT8U) ((canid & 0x1C) << 3);
tbufdata[MCP_SIDL] |= MCP_TXB_EXIDE_M;
tbufdata[MCP_SIDH] = (INT8U) (canid >> 5 );
}
else
{
tbufdata[MCP_SIDH] = (INT8U) (canid >> 3 );
tbufdata[MCP_SIDL] = (INT8U) ((canid & 0x07 ) << 5);
tbufdata[MCP_EID0] = 0;
tbufdata[MCP_EID8] = 0;
}
mcp2515_setRegisterS( mcp_addr, tbufdata, 4 );
}Function name: mcp2515_initCANBuffers
init
canbuffers
/*********************************************************************************************************
** Function name: mcp2515_initCANBuffers
** Descriptions: init canbuffers
*********************************************************************************************************/
void MCP_CAN::mcp2515_initCANBuffers(void)
{
INT8U i, a1, a2, a3;
// INT8U std = 0;
// INT8U ext = 1;
// INT32U ulMask = 0x00, ulFilt = 0x00;
//mcp2515_write_id(MCP_RXM0SIDH, ext, ulMask); /*Set both masks to 0 */
//mcp2515_write_id(MCP_RXM1SIDH, ext, ulMask); /*Mask register ignores ext bit */
/* Set all filters to 0 */
//mcp2515_write_id(MCP_RXF0SIDH, ext, ulFilt); /* RXB0: extended */
//mcp2515_write_id(MCP_RXF1SIDH, std, ulFilt); /* RXB1: standard */
//mcp2515_write_id(MCP_RXF2SIDH, ext, ulFilt); /* RXB2: extended */
//mcp2515_write_id(MCP_RXF3SIDH, std, ulFilt); /* RXB3: standard */
//mcp2515_write_id(MCP_RXF4SIDH, ext, ulFilt);
//mcp2515_write_id(MCP_RXF5SIDH, std, ulFilt);
/* Clear, deactivate the three */
/* transmit buffers */
/* TXBnCTRL -> TXBnD7 */
a1 = MCP_TXB0CTRL;
a2 = MCP_TXB1CTRL;
a3 = MCP_TXB2CTRL;
for (i = 0; i < 14; i++) { /* in-buffer loop */
mcp2515_setRegister(a1, 0);
mcp2515_setRegister(a2, 0);
mcp2515_setRegister(a3, 0);
a1++;
a2++;
a3++;
}
mcp2515_setRegister(MCP_RXB0CTRL, 0);
mcp2515_setRegister(MCP_RXB1CTRL, 0);
}